The present disclosure relates to a power semiconductor device and a method of fabricating the same allowing for a significant reduction in parasitic capacitance while having a low on resistance.
An insulated gate bipolar transistor (IGBT) is a transistor which has a gate fabricated using metal oxide silicon (MOS) and has bipolar properties implemented therein by a p-type collector layer being formed on a rear surface thereof.
Since power metal oxide silicon field emission transistors (MOSFETs) were developed, such MOSFETs have been used in applications in which fast switching characteristics are required.
However, since MOSFETs have structural limitations, a bipolar transistor, a thyristor, a gate turn-off thyristor (GTO), and the like have been used in applications in which high voltage is required.
IGBTs have features such as a low forward loss and fast switching speeds, and therefore, the use thereof has tended to be expanded into applications for which typical thyristors, bipolar transistors, metal oxide silicon field emission transistors (MOSFETs), and the like may not be appropriate.
Describing an operational principle of the IGBT, in a case in which an IGBT device is turned on, when an anode has a voltage higher than that applied to a cathode, and a voltage higher than a threshold voltage of the IGBT device is applied to a gate electrode, a polarity of a surface of a p-type well layer, formed at a lower end of the gate electrode is inverted, and thus an n-type channel is formed.
An electronic current which is injected into a drift region through the channel induces an injection of hole current from a high-concentration p-type collector layer disposed below the IGBT device, in a similar manner to a base current of a bipolar transistor.
Due to an injection of minor carriers at high concentration, a conductivity modulation in which conductivity in the drift region is increased by several times to hundreds of times may occur.
Unlike MOSFETs, IGBTs have a very small resistance component in the drift region due to such conductivity modulation, and therefor may be used in at very high voltages.
Various technologies for considerably increasing a conductivity modulation phenomenon have been developed.
For example, a technology of considerably increasing the conductivity modulation phenomenon using a phenomenon in which holes are accumulated by forming a high concentration n-type semiconductor region below a p-type well layer exists.
As such, the high-concentration n-type semiconductor region formed below the p-type well layer is known as a hole accumulation layer.
When such a hole accumulation layer is formed, the amount of accumulated holes is considerably increased and thus, the conductivity modulation phenomenon may occur to a significant degree, but the holes accumulated in the hole accumulation layer affect an input signal of a trench gate.
That is, the trench gate is affected by the hole accumulation layer and therefore gate noise occurs.
Such gate noise has a negative effect on a stable supply of current.
In particular, when a switching frequency is high, a range of variation in current due to the gate noise may be very high in turn.
Therefore, a technology for reducing the gate noise while reducing resistance by considerably increasing the conductivity modulation phenomenon is required.
Patent Document 1 of the following Related Art Document relates to a semiconductor device and a method of fabricating the same.
In detail, Patent Document 1 discloses a structure for reducing switching loss; however, unlike the present disclosure, an n-type region is formed to contact the trench gate.